It is known from, for example, U.S. Pat. No. 5,168,356 and U.S. Pat. No. 5,289,276, that it is advantageous to transmit compressed video signal in packets, with respective packets affording a measure of error protection/correction. The systems in the foregoing patents transmit and process a single television program, albeit with a plurality of program components, from respective transmission channels. These systems utilize inverse transport processors to extract the video signal component of respective programs for further processing to condition the video component for reproduction. The U.S. Pat. No. 5,289,276 only discusses processing the video signal component. The U.S. Pat. No. 5,168,356 describes an inverse transport processor which separates other program components with a simple demultiplexer responsive to packet header data for distinguishing respective signal components. The separated video component is coupled to a buffer memory, while the remaining signal components are shown coupled directly to their respective processing circuitry.
It is known from U.S. Pat. No. 5,233,654, that code may be transmitted with television signals in order to provide interactive programming. This code will typically be operated upon, or executed by, a computer associated with a television receiver.
In applications where most of the program components are compressed, some buffering is needed between the transmission channel and most of the respective component processing (decompression) apparatus, thus it is desirable to couple most, if not all components to buffer memory. The data rates of different program components may vary widely between respective components as well as within respective components. Thus it is advantageous to buffer each component separately. Buffer memory for buffering compressed program component data and for processing interactive programs in general is not insignificant. In fact it can contribute significantly to the cost of a receiver system.
If the inverse transport processor resides in, for example, a set top box, the memory size and management circuitry should be kept to a minimum to keep consumer costs as low as possible. Thus it is economically desirable to utilize the same memory and memory management circuitry for program component buffering, processor house keeping, and interactive functions.